INSTRUCTION SET ARCHITECTURE WITH EXTENSIBLE REGISTER ADDRESSING

摘要

A method and circuit arrangement selectively source and/or write data from/to extended registers of an extended register file based in part on whether an operand address of an instruction references a primary register of primary register file configured to store a pointer to the extended register. Control logic connected to the primary register file and the extended register file determines whether the operand address references a primary register configured to store a pointer, and responsive to the determination, the control logic causes execution logic to selectively source and/or write data from/to the extended register pointed to by the pointer stored in the referenced primary register.

主权项

1. A method for executing instructions comprising:
in response to decoding an instruction that references an operand address, determining whether the operand address references a register among a subset of registers in a primary register file; selectively sourcing data from an extended register of an extended register file using a pointer stored in the referenced register that references the extended register responsive to determining that the operand address references a register among the subset of registers in the primary register file; and executing the instruction using the selectively sourced data.