发明名称 SWITCHING POWER SUPPLY DEVICE AND PULSE WIDTH MODULATION CIRCUIT USED THEREIN
摘要 A problem of the present invention is to provide a switching power supply device and a pulse width modulation circuit capable of operating stably in synchronization with a clock signal. To solve the problem, a pulse width modulation circuit 3A in a switching power supply device 1A includes square-wave voltage output means 8A for, when an integrated voltage Vn rises to an upper threshold voltage or more, shifting a square-wave voltage VPWM to L level, or when the voltage Vn drops to a lower threshold voltage or less, shifting the voltage VPWM to H level, and clock means 6A for outputting a first clock signal VCL1 and a second clock signal VCL2, which are 180° out of phase from each other. The square-wave voltage output means 8A is adapted to: (1) if the clock signal VCL1 changes while the voltage Vn is dropping, shift the voltage VPWM to H level even when the voltage Vn has not yet reached the lower threshold voltage; and (2) if the clock signal VCL2 changes while the voltage Vn is rising, shift the voltage VPWM to L level even when the voltage Vn has not yet reached the upper threshold voltage.
申请公布号 US2015022165(A1) 申请公布日期 2015.01.22
申请号 US201214372241 申请日期 2012.07.19
申请人 Oita University 发明人 Sato Terukazu
分类号 H03K3/017;H02M3/158 主分类号 H03K3/017
代理机构 代理人
主权项 1. A pulse width modulation circuit for generating a square-wave voltage taking two states at L and H levels to drive switching elements included in a converter portion, the circuit comprising: square-wave voltage output means for shifting the square-wave voltage to L level when an integrated voltage obtained by integrating the square-wave voltage rises to an upper threshold voltage or more, or shifting the square-wave voltage to H level when the integrated voltage falls to a lower threshold voltage or less; and clock means for outputting a first clock signal and a second clock signal to the square-wave voltage output means, the first clock signal and the second clock signal being 180° out of phase from each other, wherein, the square-wave voltage output means is adapted to: (1) when the first clock signal changes while the integrated voltage is dropping, shift the square-wave voltage to H level even if the integrated voltage has not yet reached the lower threshold voltage; and (2) when the second clock signal changes while the integrated voltage is rising, shift the square-wave voltage to L level even if the integrated voltage has not yet reached the upper threshold voltage.
地址 Oita JP