发明名称 |
DESIGN METHOD OF WIRING LAYOUT, SEMICONDUCTOR DEVICE, PROGRAM FOR SUPPORTING DESIGN OF WIRING LAYOUT, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE |
摘要 |
According to one embodiment, a design method of layout formed by a sidewall method is provided. The method includes: preparing a base pattern on which a plurality of first patterns extending in a first direction and arranged at a first space in a second direction intersecting the first direction and a plurality of second patterns extending in the first direction and arranged at a center between the first patterns, respectively, are provided; and drawing a connecting portion which extends in the second direction and connects two neighboring first patterns sandwiching one of the second patterns, and separating the one of the second patterns into two patterns not contacting the connecting portion. |
申请公布号 |
US2015021782(A1) |
申请公布日期 |
2015.01.22 |
申请号 |
US201414506436 |
申请日期 |
2014.10.03 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
KODAMA Chikaaki;NAKAYAMA Koichi;KOTANI Toshiya;NOJIMA Shigeki;NAKAJIMA Fumiharu;ICHIKAWA Hirotaka |
分类号 |
G06F17/50;H01L21/768;H01L21/306;H01L23/528 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
|
主权项 |
1. A design method of layout formed by a sidewall method, comprising:
preparing a base pattern on which a plurality of first patterns extending in a first direction and arranged at a first space in a second direction intersecting the first direction and a plurality of second patterns extending in the first direction and arranged at a center between the first patterns, respectively, are provided; and drawing a connecting portion which extends in the second direction, and connects two neighboring first patterns sandwiching one of the second patterns, and separating the one of the second patterns into two patterns not contacting the connecting portion. |
地址 |
Minato-ku JP |