Formation of tungsten contacts to silicon diffused regions - reduces series resistance of contacts and results in planar surface for interconnection pattern

摘要

On a semiconductor substrate (21) are formed source/drain diffused areas (28,30), separated by a gate insulation layer (24) and gate electrode (25). Oxide spacers (29) are present on the side walls of the gate electrode and its overlying insulation layer (26). Field oxide insulating regions (22) are formed between active elements. The features claimed are that on the diffused regions first layers (31) are formed of a conductive material, e.g. Si or W (31) to planrise the surface. Then another metal layer (32), pref. W, is deposited and etched to overlap the gate-xide and provide a planar contact area for the interconnecting metal (35) which is deposited on an insulating intermeduate layer (33). USE/ADVANTAGE - The process allows contact to be made to larger areas of the drain/source regions. The first metal layer (31) planrises the surface, reducing the problems due to metal alyers following the contours of insulation layers. The process is used for the mfr. of intergrated circuits.