发明名称 Semiconductor devices comprising GSG interconnect structures
摘要 Semiconductor devices and methods of manufacture thereof are disclosed. In an embodiment, a method of manufacturing a semiconductor device includes forming a first conductive structure over a workpiece in a first metallization layer, the first conductive structure including a first portion having a first width and a second portion having a second width. The second width is different than the first width. The method includes forming a second conductive structure in a second metallization layer proximate the first metallization layer, and coupling a portion of the second conductive structure to the first portion of the first conductive structure.
申请公布号 US8937389(B2) 申请公布日期 2015.01.20
申请号 US201213569017 申请日期 2012.08.07
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Liu Christianto Chih-Ching;Chen Shuo-Mao;Yeh Der-Chyang;Hou Shang-Yun;Jeng Shin-Puu
分类号 H01L23/48;H01L21/4763;H01L23/522;H01L21/768;H05K1/02 主分类号 H01L23/48
代理机构 Slater & Matsil, L.L.P. 代理人 Slater & Matsil, L.L.P.
主权项 1. A method of manufacturing a semiconductor device, the method comprising: forming a first conductive structure over a workpiece in a first metallization layer, the first conductive structure including a first signal interconnect having a first width and a first ground interconnect electrically isolated from the first signal interconnect and having a second width; forming a second conductive structure in a second metallization layer proximate the first metallization layer, the second conductive structure including a second signal interconnect and a second ground interconnect electrically isolated from the second signal interconnect; coupling the second signal interconnect to the first signal interconnect by a first via disposed in a third metallization layer, the third metallization layer being disposed between the first metallization layer and the second metallization layer, the first via having a width smaller than the first width; and coupling the second ground interconnect to the first ground interconnect by a second via disposed in the third metallization layer, the second via having a width smaller than the second width.
地址 Hsin-Chu TW