发明名称 Delay method, circuit and integrated circuit
摘要 This document discusses, among other things, a delay circuit, in which a first register is written with a delay reference code, a second register is written with a delay factor, a control unit determines a corresponding delay ratio in a storage unit based on the delay factor in the second register, and sends the determined delay ratio to a first digital timing unit, the first digital timing unit determines a delay reference time based on the delay reference code in the first register, multiplies the delay reference time by the delay ratio to result in a desired delay time, and generates a delay.
申请公布号 US8937500(B2) 申请公布日期 2015.01.20
申请号 US201314109161 申请日期 2013.12.17
申请人 Fairchild Semiconductor Corporation 发明人 Lam Ming Chuen Alvan;Sun Weiming;Wang Emma;Zhu Peng
分类号 H03K5/14 主分类号 H03K5/14
代理机构 Schwegman Lundberg & Woessner, P.A. 代理人 Schwegman Lundberg & Woessner, P.A.
主权项 1. A delay circuit, comprising: an oscillator configured to supply clock signals; a first register configured to be written with a delay reference code; a second register configured to be written with a delay factor; a storage unit configured to store delay factors and corresponding delay ratios; a control unit configured to determine a corresponding delay ratio in the storage unit based on the delay factor in the second register; and a first digital timing unit configured to receive the determined delay ratio from the control unit, to determine a delay time based on the delay reference code in the first register and the delay ratio, and to generate a delay based on the delay time.
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