Structure and method for topography free SOI integration

摘要

A semiconductor structure is provided that includes a semiconductor oxide layer having features. The semiconductor oxide layer having the features is located between an active semiconductor layer and a handle substrate. The semiconductor structure includes a planarized top surface of the active semiconductor layer such that the semiconductor oxide layer is beneath the planarized top surface. The features within the semiconductor oxide layer are mated with a surface of the active semiconductor layer.

主权项

1. A method for semiconductor manufacturing, comprising:
forming a semiconductor oxide layer on a top surface of a semiconductor substrate using a first thermal oxidation; patterning the semiconductor oxide layer; performing a second thermal oxidation of the patterned semiconductor oxide layer to form a semiconductor oxide layer having features; planarizing an exposed surface of the semiconductor oxide layer having features to provide a feature-containing semiconductor oxide layer having an entirely planar surface that is opposite a surface containing said features; bonding a semiconductor surface of a handle substrate directly to the entirely planar surface of the feature-containing semiconductor oxide layer to form a semiconductor structure containing from bottom to top, said semiconductor substrate, said feature-containing oxide layer and said handle substrate, wherein said feature-containing oxide layer entirely separates said semiconductor substrate from said handle substrate; inverting said semiconductor structure to provide an inverted structure of, from bottom to top, said handle substrate, said feature-containing semiconductor oxide layer, and said semiconductor substrate; and planarizing an exposed surface of the semiconductor substrate of the inverted structure providing an active semiconductor layer, said feature-containing semiconductor oxide layer is a continuous layer spanning an entire length of the active semiconductor layer and said handle substrate, and wherein an entirety of the feature-containing semiconductor oxide layer is located beneath an exposed surface of the active semiconductor layer, and the feature-containing semiconductor oxide layer is located between the active semiconductor layer and the handle substrate and wherein said surface containing said features is non-planar, located above said entirely planar surface, and is in direct contact with said active semiconductor layer.