发明名称 Detection method for semiconductor integrated circuit device, and semiconductor integrated circuit device
摘要 Integrated circuit layers to be stacked on top of each other are formed with a plurality of inspection rectifier device units, respectively. The inspection rectifier device units including rectifier devices are connected between a plurality of connection terminals and a positive power supply lead and a grounding lead and emit light in response to a current. After electrically connecting the plurality of connection terminals to each other, a bias voltage is applied between the positive power supply lead and the grounding lead, and the connection state between the connection terminals is inspected according to a light emission of the inspection rectifier device unit. This makes it possible to inspect, in a short time every time a layer is stacked, whether or not an interlayer connection failure exists in a semiconductor integrated circuit device constructed by stacking a plurality of integrated circuit layers in their thickness direction.
申请公布号 US8937310(B2) 申请公布日期 2015.01.20
申请号 US201113703945 申请日期 2011.06.13
申请人 Hamamatsu Photonics K.K. 发明人 Nakamura Tomonori
分类号 H01L23/58;H01L21/66;H01L23/48;H01L25/065;H01L25/00;H01L27/08 主分类号 H01L23/58
代理机构 Drinker Reath & Reath LLP 代理人 Drinker Reath & Reath LLP
主权项 1. A semiconductor integrated circuit device inspection method for inspecting a semiconductor integrated circuit device constructed by stacking a plurality of integrated circuit layers, each including a support layer having front and rear faces, a semiconductor device group formed on the front face of the support layer, and a wiring layer including a first lead formed on the front face of the support layer, in a thickness direction thereof; the method comprising the steps of: forming, when making a first of the integrated circuit layers, on the front face a plurality of first inspection rectifier device units connected between a plurality of connection terminals for electrically connecting with a second of the integrated circuit layers and the first lead and adapted to emit light in response to a current, each of the first inspection rectifier device units including a rectifier device; forming, when making the second integrated circuit layer, on the front face a plurality of second inspection rectifier device units connected between a plurality of connection terminals for electrically connecting with the first integrated circuit layer and the first lead and adapted to emit light in response to a current, each of the second inspection rectifier device units including a rectifier device, while providing a light-transmitting region in the wiring layer on the second inspection rectifier device units, the light-transmitting region having a wiring density lower than that in the remaining region; causing the rear face of the second integrated circuit layer and the first integrated circuit layer to oppose each other when stacking the second integrated circuit layer on top of the first integrated circuit layer; electrically connecting the plurality of connection terminals in the first integrated circuit layer and the plurality of connection terminals in the second integrated circuit layer to each other and then applying a bias voltage to the first and second inspection rectifier device units through the first leads of the first and second integrated circuit layers; and inspecting a connection state between the plurality of connection terminals of the first integrated circuit layer and the plurality of connection terminals of the second integrated circuit layer according to a light emission of the second inspection rectifier device unit observed through the light-transmitting region on the front face side of the second integrated circuit layer.
地址 Hamamatsu-shi, Shizuoka JP