发明名称 Voltage level control circuit and associated method
摘要 A voltage level control circuit controls a target slicing voltage level to slice a video signal by a target circuit. The voltage level control circuit includes a slicing circuit for sequentially slicing the video signal by a plurality of slicing voltage levels to correspondingly generate a plurality of first clock signals; a detection circuit for respectively detecting a plurality of phase differences between the first clock signals and a plurality of corresponding second clock signals to generate a plurality of detection signals; an oscillating circuit for generating the second clock signals according to the detection signals, respectively; and an adjusting circuit for determining whether to adjust the target slicing voltage level according to the detection signals corresponding to the slicing voltage levels.
申请公布号 US8937684(B2) 申请公布日期 2015.01.20
申请号 US201113316749 申请日期 2011.12.12
申请人 MStar Semiconductor, Inc. 发明人 Wu Shao-Chih;Chen Chien-Hung;Wong Wei-Shu
分类号 H04N5/06;H04N5/08 主分类号 H04N5/06
代理机构 Edell, Shapiro & Finnan, LLC 代理人 Edell, Shapiro & Finnan, LLC
主权项 1. A voltage level control circuit, for controlling a target slicing voltage level used to slice a video signal by a target circuit, the voltage level control circuit comprising: a slicing circuit, for slicing the video signal by sequentially adopting a plurality of slicing voltage levels to correspondingly generate a plurality of first clock signals; a detection circuit, for respectively detecting a plurality of phase differences between the first clock signals and a plurality of second clock signals to generate a plurality of detection signals; an oscillating circuit, for generating the second clock signals according to the detection signals, respectively; and an adjusting circuit, determining whether to adjust the target slicing voltage level according to the detection signals corresponding to the slicing voltage levels, wherein the video signal is a composite video blanking sync signal, and wherein the target slicing voltage level is for slicing horizontal synchronization signal components of the composite video blanking sync signal.
地址 Hsinchu Hsien TW
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