System and a method for designing a hybrid memory cell with memristor and complementary metal-oxide semiconductor

摘要

The embodiments herein relates to a hybrid non-volatile memory cell system and architecture for designing integrated circuits. The system comprises CMOS access transistor connected to a memristor which stores a data based on a resistance. The system has a word line for accessing the hybrid memory and two bit lines carrying data of mutually opposite values for transferring a data from the memory. The two terminals of the transistor are connected respectively to a first terminal of the memristor and to a first bit line. The gate terminals of the transistors are coupled together to form a word line. The access transistors control the two bit lines during a read and write operation. A control logic performs a read and write operation with the hybrid memory cells. The memory architecture prevents a power leakage during data storage and controls a drift in a state during a read process.

主权项

1. A method of designing an efficient hybrid non-volatile memory cell and a hybrid memory array architecture, the method comprises:
connecting a one or more transistors to a memristor, wherein the memristor is a memory element; providing a word line, wherein the word line is a gate terminal of the one or more transistors; providing a set of two bit lines, wherein a value of a data carried in the set of two bit lines are mutually opposite to each other; creating a control logic circuit, wherein the control logic controls an operation related with an accessing of the hybrid non-volatile memory cells, and wherein the control logic minimizes a state drift during a read operation from the hybrid non-volatile memory cell, wherein the state drift is minimized by reading the data with a decaying voltage, wherein a direction of read is from OFF state to ON state; connecting a pluralities of hybrid non-volatile memory cells and forming a hybrid memory array architecture; and accessing the hybrid memory array architecture for a read and write operation.