发明名称 IMAGE DECODER
摘要 PROBLEM TO BE SOLVED: To provide an H.265/HEVC image decoder which comprises single a piece of hardware which is not parallelized for decoding a plurality of tiles and filtering at tile boundaries, and is capable of suppressing the frequency of accessing decoded data for the tile boundaries in a frame memory for filtering, or suppressing circuit scale of a buffer for holding the decoded data for the tile boundaries.SOLUTION: Irrespective of a size or positional relation of tiles, decoding and filtering are performed on an entire screen in the order of raster scanning. At tile boundaries, the decoding of a tile at a right side of a left-top tile in the same row is performed before decoding a tile below the left-top tile in a next row. Furthermore, filtering for the same row including the left-top tile is performed using decoded data obtained from the decoding.
申请公布号 JP2015012410(A) 申请公布日期 2015.01.19
申请号 JP20130135755 申请日期 2013.06.28
申请人 RENESAS ELECTRONICS CORP 发明人 HASHIMOTO RYOJI;KAYA TOSHIYUKI
分类号 H04N19/50 主分类号 H04N19/50
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