| 摘要 |
PROBLEM TO BE SOLVED: To quickly transition a DLL circuit to a lock state.SOLUTION: A semiconductor device includes: a variable delay line 110 and a replica circuit 120 for delaying an internal clock signal PCLK according to a count value CNT to generate a replica clock signal RCLK; a phase determination circuit 130 for comparing phases of the internal clock signal PCLK and the replica clock signal RCLK to generate a phase determination signal PD; an up/down counter 140 for updating the count value CNT according to the phase determination signal PD every time an update signal CK1 is activated; and an update control circuit 160 for generating the update signal CK1 at a variable period. According to the invention, the variable generation period of the update signal CK1 enables a quick transition to a lock state. |
