PORT PACKET QUEUING

摘要

A port queue includes a first memory portion having a first memory access time and a second memory portion having a second memory access time. The first memory portion includes a cache row. The cache row includes a plurality of queue entries. A packet pointer is enqueued in the port queue by writing the packet pointer in a queue entry in the cache row in the first memory. The cache row is transferred to a packet vector in the second memory. A packet pointer is dequeued from the port queue by reading a queue entry from the packet vector stored in the second memory.

主权项

1. A queue, the queue having an egress port queue associated with an egress port of a switch, the egress port queue comprising:
a first queue memory being configured to receive and enqueue a pointer corresponding to a received data packet, the first queue memory having a first access time; a second queue memory in communication with the first queue memory, the second queue memory having a second access time, the first access time being shorter than the second access time; and control logic configured to transfer a plurality of pointers from the first queue memory to the second queue memory in a single transfer cycle, and dequeue each pointer of a plurality of pointers from the second queue memory.