发明名称 |
Array Substrate, Manufacturing Method Thereof, And Display Device |
摘要 |
Embodiments of the present invention provide an array substrate, a manufacturing method thereof, and a display device. The array substrate comprises: a pixel region, a data-line pad region and a gate-line pad region; the pixel region comprises: a pixel electrode, a gate electrode of a TFT, source and drain electrodes of the TFT, a connection electrode, and a common electrode; the data-line pad region comprises: an insulating layer, a semiconductor layer, a data line, and a data-line connection pad; the data line and the source and drain electrodes are of a same layer and a same material; and the gate-line pad region comprises: a gate line, an insulating layer, and a gate-line connection pad; the gate line and the gate electrode are of a same layer and a same material; and the gate-line connection pad and the source and drain electrodes are of a same layer and a same material. The array substrate can reduce the number of masks and exposure times, thereby reducing manufacturing costs and improving production efficiency. |
申请公布号 |
US2015014692(A1) |
申请公布日期 |
2015.01.15 |
申请号 |
US201213995926 |
申请日期 |
2012.11.06 |
申请人 |
BOE Technology Group Co., Ltd. ;Hefei Xinsheng Optoelectronics Technology Co., Ltd |
发明人 |
Wu Song |
分类号 |
H01L27/12;G02F1/1368;G02F1/1362 |
主分类号 |
H01L27/12 |
代理机构 |
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代理人 |
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主权项 |
1. An array substrate, comprising: a pixel region, a data-line pad region and a gate-line pad region;
wherein the pixel region comprises: a pixel electrode, a gate electrode of a thin-film transistor (TFT), source and drain electrodes of the TFT, a connection electrode electrically connecting the pixel electrode with the drain electrode of the TFT, and a common electrode; the pixel electrode is provided on an upper surface of the substrate; the gate electrode of the TFT and the connection electrode are of a same layer and a same material; a semiconductor layer is formed between the source, drain electrodes and the gate electrode; an insulating layer is formed between the semiconductor layer and the gate electrode; the pixel electrode is electrically connected with the drain electrode of the TFT via the connection electrode; the common electrode comprises a portion that is of a same layer and a same material as the source, drain electrodes, moreover, the semiconductor layer and the insulating layer are sequentially formed between said portion that is of a same layer and a same material as the source, drain electrodes and the pixel electrode; the data-line pad region comprises a data line and a data-line connection pad, the data line and the source and drain electrodes are of a same layer and a same material; and the gate-line pad region comprises a gate line and a gate-line connection pad; the gate line and the gate electrode are of a same layer and a same material; and the gate-line connection pad and the source and drain electrodes are of a same layer and a same material. |
地址 |
Beijing CN |