发明名称 EARLY DATA DELIVERY PRIOR TO ERROR DETECTION COMPLETION
摘要 A computer implemented method for early data delivery prior to error detection completion in a memory system includes receiving a frame of a multi-frame data block at a memory control unit interface. A controller writes the frame to a buffer control block in a memory controller nest domain. The frame is read from the buffer control block by a cache subsystem interface in a system domain prior to completion of error detection of the multi-frame data block. Error detection is performed on the frame by an error detector in the memory controller nest domain. Based on detecting an error in the frame, an intercept signal is sent from the memory controller nest domain to a correction pipeline in the system domain. The intercept signal indicates that error correction is needed prior to writing data in the frame to a cache subsystem.
申请公布号 US2015019935(A1) 申请公布日期 2015.01.15
申请号 US201414501101 申请日期 2014.09.30
申请人 International Business Machines Corporation 发明人 Gilda Glenn D.;Hodges Mark R.;Papazova Vesselina K.;Meaney Patrick J.
分类号 G06F11/10 主分类号 G06F11/10
代理机构 代理人
主权项 1. A computer implemented method for early data delivery prior to error detection completion in a memory system, the method comprising: receiving a frame of a multi-frame data block at a memory control unit interface; writing, by a controller, the frame to a buffer control block in a memory controller nest domain; reading the frame from the buffer control block by a cache subsystem interface in a system domain prior to completion of error detection of the multi-frame data block; performing error detection on the frame by an error detector in the memory controller nest domain; and based on detecting an error in the frame, sending an intercept signal from the memory controller nest domain to a correction pipeline in the system domain, the intercept signal indicating that error correction is needed prior to writing data in the frame to a cache subsystem.
地址 Armonk NY US