| 摘要 |
Compiling computer program instructions for implementation on a reconfigurable processor comprising a plurality of operational cells, each operational cell being connectable to and disconnectable from one or more of the other operational cells via a programmable interconnect. A routing step in which one or more signal processing paths are determined, each signal processing path comprising two or more of the operational cells connected via the programmable interconnect. The paths may be implemented on the operational cells, and a post-routing step performed in which an extended signal processing path is determined by extending signal processing paths such that a critical path is longer than a longest critical path of the signal processing paths determined in the routing step. Paths may end at an end point cell in the reconfigurable processor. Operational cells may be asynchronous pipelined interconnect operational cells. |
