发明名称 DISPLAY CONTROL DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To reduce the power consumption of a display control device. SOLUTION: A CPU access processing part 106 performs a read-write to 5 memory 102 according to the memory read-write request from a CPU 101. An IDLE detecting part 107 inputs the operating state of the CPU access processing part 106 and the memory read-write request signal from the CPU 101 and detects that the memory read-write requested from the CPU 101 is not in execution (laid in waiting state) in the CPU access processing part 106, and no new memory read-write is requested from the CPU 101 as the condition for stopping the clock. A CCLK control part 109 stops the clock to be supplied to the CPU access processing part 106 when the condition for stopping the clock is detected by the IDLE detecting part 107, whereby the power consumption of the CPU access processing part 106 is reduced.</p>
申请公布号 JPH10161624(A) 申请公布日期 1998.06.19
申请号 JP19960322706 申请日期 1996.12.03
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NAGAO AKIFUMI
分类号 G06F1/04;G09G5/00;G09G5/18;(IPC1-7):G09G5/00 主分类号 G06F1/04
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