HIGH SPEED VIA

摘要

A method is used for designing a multilayered circuit substrate that generates a physical design layout. The physical design layout represents of at least one electrical circuit passing through a plurality of layers. Based on performance requirements of the electrical circuit, a maximum allowable stub length of a via in the electrical circuit is computed. The computer processor determines if a stub length of an existing via in the physical design layout of the electrical circuit is less than the maximum allowable stub length. If the computer determines that the stub length of the existing via is less than the maximum allowable stub length, the computer removes an external non-functional pad of the existing via from the physical design layout.

主权项

1. A method for designing a multilayered circuit substrate, the method comprising:
generating a physical design layout wherein the physical design layout is a representation of at least one electrical circuit passing through a plurality of layers; based on performance requirements of the electrical circuit, determining, by one or more computer processors, a maximum allowable stub length of a via of the electrical circuit; determining, by one or more computer processors, whether a stub length of an existing via in the physical design layout of the electrical circuit is less than the maximum allowable stub length; and in response to determining that the stub length of the existing via is less than the maximum allowable stub length, removing an external non-functional pad of the existing via from the physical design layout.