发明名称 SEMICONDUCTOR CHIP INTERCONNECT BARRIER MATERIAL AND FABRICATION METHOD
摘要 <p>A microelectronic semiconductor interconnect structure barrier and method of deposition provide improved conductive barrier material properties for high-performance device interconnects. The barrier comprises a dopant selected from the group consisting of platinum, palladium, iridium, rhodium, and tin. The barrier can comprise a refractory metal selected from the group consisting of tantalum, tungsten, titanium, chromium, and colbalt, and can also comprise a third element selected from the group consisting of carbon, oxygen and nitrogen. The dopant and other barrier materials can be deposited by chemical-vapor deposition to achieve good step coverage and a relatively conformal thin film with a good nucleation surface for subsequent metallization such as copper metallization. In one embodiment, the barrier suppresses diffusion of copper into other layers of the device, including the inter-metal dielectric, pre-metal dielectric, and transistor structures.</p>
申请公布号 WO2000038224(A1) 申请公布日期 2000.06.29
申请号 US1999030662 申请日期 1999.12.21
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