发明名称 Promotion of partial data segments in flash cache
摘要 For efficient track destage in secondary storage in a more effective manner, for temporal bits employed with sequential bits for controlling the timing for destaging the track in a primary storage, the temporal bits and sequential bits are transferred from the primary storage to the secondary storage. The temporal bits are allowed to age on the secondary storage.
申请公布号 US8935462(B2) 申请公布日期 2015.01.13
申请号 US201313830407 申请日期 2013.03.14
申请人 International Business Machines Corporation 发明人 Benhase Michael T.;Blinick Stephen L.;Eleftheriou Evangelos S.;Gupta Lokesh M.;Haas Robert;Hu Xiao-Yu;Kalos Matthew J.;Koltsidas Ioannis;Nielsen Karl A.;Pletka Roman A.
分类号 G06F12/00;G06F12/08 主分类号 G06F12/00
代理机构 Griffiths & Seaton PLLC 代理人 Griffiths & Seaton PLLC
主权项 1. A method for promoting partial data segments in a computing storage environment having lower and higher speed levels of cache by a processor, comprising: configuring a data moving mechanism adapted for performing at least one of: allowing the partial data segments to remain in the higher speed cache level for a time period longer that at least one whole data segment, andimplementing a preference for movement of the partial data segments to the lower speed cache level based on at least one of an amount of holes and a data heat metric, wherein: a first of the partial data segments having at least one of a lower amount of holes and a hotter data heat metric is moved to the lower speed cache level ahead of a second of the partial data segments having at least one of a higher amount of holes and a cooler data heat; andif the first of the partial data segments has a hotter data heat metric and greater than a predetermined number of holes, the first of the partial data segments is discarded.
地址 Armonk NY US