发明名称 Low-power consumption semiconductor memory device
摘要 A memory cell unit includes a first storage element and a second storage element for storing complementary data with each other. In a selected state, the first and second storage elements are connected to complementary bit lines, respectively at a time. In a standby state, the bit lines are precharged to a voltage (Vccs or GND) corresponding to the data stored in the memory cell unit. Refresh-free, low-current-consumption semiconductor memory device operating stably even under a low power supply voltage can be implemented.
申请公布号 US2002001251(A1) 申请公布日期 2002.01.03
申请号 US20010756272 申请日期 2001.01.09
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 FUJINO TAKESHI;ARIMOTO KAZUTAMI;SHIMANO HIROKI
分类号 G11C11/405;G11C7/12;G11C11/409;G11C11/4094;H01L21/8242;H01L27/10;H01L27/108;(IPC1-7):G11C8/00 主分类号 G11C11/405
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