DOUBLE PATTERNING TECHNOLOGY (DPT) LAYOUT ROUTING

摘要

One or more techniques or systems for determining double patterning technology (DPT) layout routing compliance are provided herein. For example, a layout routing component of a system is configured to assign a pin loop value to a pin loop. In some embodiments, the pin loop value is assigned based on a mask assignment of a pin of the pin loop. In some embodiments, the pin loop value is assigned based on a number of nodes associated with the pin loop. DPT compliance or a DPT violation is determined for the pin loop based on the pin loop value. In this manner, odd loop detection associated with DPT layout routing is provided because a DPT violation results in generation of an additional instance of a net, for example. Detecting an odd loop allows a design to be redesigned before fabrication, where the odd loop would present undesired issues.

主权项

1. A system for determining double patterning technology (DPT) layout routing compliance, comprising:
a layout routing component configured to:
create a first pin group comprising a first set of one or more pre-colored pins that are linked together by a first set of internal conflict spaces;associate the first pin group with a first phantom assisted feature (AF) mask polygon, the associating comprising:
selecting a first pre-colored pin from the first set of one or more pre-colored pins;determining a first mask assignment associated with the first pre-colored pin; andassigning the first phantom AF mask polygon to a different mask than a mask for the first pre-colored pin according to the first mask assignment;create a pin loop based on the first pre-colored pin and the phantom AF mask polygon;assign a pin loop value to the pin loop; anddetermine whether a double patterning technology (DPT) violation is present for the pin loop based on the pin loop value.