VALID COMMAND DETECTION BASED ON STACK POSITION IDENTIFIERS IN MEMORY DEVICES CONFIGURED FOR STACKED ARRANGEMENTS

摘要

Disclosed are various embodiments related to stacked memory devices, such as DRAMs, SRAMs, EEPROMs, ReRAMs, and CAMs. For example, stack position identifiers (SPIDs) are assigned or otherwise determined, and are used by each memory device to make a number of adjustments. In one embodiment, a self-refresh rate of a DRAM is adjusted based on the SPID of that device. In another embodiment, a latency of a DRAM or SRAM is adjusted based on the SPID. In another embodiment, internal regulation signals are shared with other devices via TSVs. In another embodiment, adjustments to internally regulated signals are made based on the SPID of a particular device. In another embodiment, serially connected signals can be controlled based on a chip SPID (e.g., an even or odd stack position), and whether the signal is an upstream or a downstream type of signal.

主权项

1. A semiconductor memory device, comprising:
a) a stack position identifier for identifying a position of the semiconductor memory device in an aligned vertical stack of a plurality of semiconductor memory devices, wherein the plurality of semiconductor devices are coupled together via a plurality of common vertical connections; b) a receiver configured to receive a plurality of chip select signals from the plurality of common vertical connections; and c) a command detector configured to detect whether a command is valid for the semiconductor memory device based on a bit-by-bit comparison of the received plurality of chip select signals against the stack position identifier.