发明名称 |
ACCELERATED ERASURE CODING SYSTEM AND METHOD |
摘要 |
An accelerated erasure coding system includes a processing core for executing computer instructions and accessing data from a main memory, and a non-volatile storage medium for storing the computer instructions. The processing core, storage medium, and computer instructions are configured to implement an erasure coding system, which includes: a data matrix for holding original data in the main memory; a check matrix for holding check data in the main memory; an encoding matrix for holding first factors in the main memory, the first factors being for encoding the original data into the check data; and a thread for executing on the processing core. The thread includes: a parallel multiplier for concurrently multiplying multiple entries of the data matrix by a single entry of the encoding matrix; and a first sequencer for ordering operations through the data matrix and the encoding matrix using the parallel multiplier to generate the check data. |
申请公布号 |
US2015012796(A1) |
申请公布日期 |
2015.01.08 |
申请号 |
US201414223740 |
申请日期 |
2014.03.24 |
申请人 |
STREAMSCALE, INC. |
发明人 |
Anderson Michael H.;Mann Sarah |
分类号 |
H03M13/00;H03M13/37 |
主分类号 |
H03M13/00 |
代理机构 |
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代理人 |
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主权项 |
1. A system for accelerated error-correcting code (ECC) processing comprising:
a processing core for executing computer instructions and accessing data from a main memory; and a non-volatile storage medium for storing the computer instructions, wherein the processing core, the storage medium, and the computer instructions are configured to implement an erasure coding system comprising:
a data matrix for holding original data in the main memory;a check matrix for holding check data in the main memory;an encoding matrix for holding first factors in the main memory, the first factors being for encoding the original data into the check data; anda thread for executing on the processing core and comprising:
a parallel multiplier for concurrently multiplying multiple data entries of a matrix by a single factor; anda first sequencer for ordering operations through the data matrix and the encoding matrix using the parallel multiplier to generate the check data. |
地址 |
Los Angeles CA US |