Variation Resistant MOSFETs with Superior Epitaxial Properties

摘要

Variation resistant metal-oxide-semiconductor field effect transistors (MOSFET) are manufactured using a high-K, metal-gate ‘channel-last’ process. Between spacers formed over a well area having separate drain and source areas, a recess in the underlying is formed using a crystallographic etch to provide [111] boundaries adjacent the source and drain regions. An ion implant step localized by the cavity results in a localized increase in well-doping directly beneath the recess. Within the recess, an active region is formed using an un-doped or lightly doped epitaxial layer, deposited at a very low temperature. A high-K dielectric stack is formed over the lightly doped epitaxial layer, over which a metal gate is formed within the cavity boundaries.

主权项

1. A method of manufacturing a metal-oxide-semiconductor field effect transistor (MOSFET) comprising:
a) forming source and drain regions in a silicon surface; b) forming a recess in the silicon between the source and drain regions, the recess having first vertical sidewalls adjacent the source and drain regions defined by spacers formed above the silicon surface, and second vertical sidewalls defined by isolation regions; c) selectively etching within the recess using an etch having a crystallographic selectivity to form a cavity having sidewalls of the cavity touching the source and drain regions defined by [111] crystal planes; d) growing a channel epitaxial layer in the cavity; e) providing a gate insulator over the top of the channel epitaxial layer, and depositing a gate over the gate insulator; f) growing the channel epitaxial layer in the cavity in d) and all subsequent processes being completed at temperatures of 750° C. or lower.