Resolver-to-digital converter

摘要

According to one aspect, a resolver-to-digital converter induces a first filter 208 configured to receive a first delta-sigina modulated resolver input. A second filter 210 is configured to receive a second delta-sigma modulated resolver input. A summing junction 216 is configured to output a difference between a scaled output of the first filter and a scaled output of the second filter. A controller 222 is configured to generate a controller output based on a product of a demodulator 226 and an output of the summing junction. An integrator 230 is configured to generate an estimated position based on the controller output. The resolver-to-digital converter also includes a compensator configured to generate a compensated estimated position based on the controller output and a compensation offset delay adjustment.