发明名称 |
CACHE COHERENT SUPPORT FOR FLASH IN A MEMORY HIERARCHY |
摘要 |
<p>System and method for using flash memory in a memory hierarchy. A computer system includes a processor coupled to a memory hierarchy via a memory controller. The memory hierarchy includes a cache memory, a first memory region of random access memory coupled to the memory controller via a first buffer, and an auxiliary memory region of flash memory coupled to the memory controller via a flash controller. The first buffer and the flash controller are coupled to the memory controller via a single interface. The memory controller receives a request to access a particular page in the first memory region. The processor detects a page fault corresponding to the request and in response, invalidates cache lines in the cache memory that correspond to the particular page, flushes the invalid cache lines, and swaps a page from the auxiliary memory region to the first memory region.</p> |
申请公布号 |
EP2430551(A4) |
申请公布日期 |
2015.01.07 |
申请号 |
EP20100775527 |
申请日期 |
2010.05.13 |
申请人 |
ORACLE AMERICA, INC. |
发明人 |
KAPIL, SANJIV;HETHERINGTON, RICKY, C. |
分类号 |
G06F12/08;G06F12/12;G06F13/16 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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