发明名称 半導体素子およびその製造方法
摘要 A method for manufacturing a semiconductor device, by which a multiple quantum well structure having a large number of pairs can be efficiently grown while maintaining good crystalline quality, and the semiconductor device, are provided. The semiconductor device manufacturing method of the present invention includes a step of forming a multiple quantum well structure 3 having 50 or more pairs of group III-V compound semiconductor quantum wells. In the step of forming the multiple quantum well structure 3, the multiple quantum well structure is formed by metal-organic vapor phase epitaxy using only metal-organic sources (all metal-organic source MOVPE).
申请公布号 JP5649157(B2) 申请公布日期 2015.01.07
申请号 JP20090206317 申请日期 2009.09.07
申请人 住友電気工業株式会社 发明人 藤井 慧;石塚 貴司;秋田 勝史;永井 陽一;田辺 達也
分类号 H01L21/205;H01L27/146;H01L31/10;H01S5/343 主分类号 H01L21/205
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