发明名称 CONDUCTIVE LINE PATTERNING
摘要 The present invention relates to conductive line patterning. The method includes placing two conductive lines in a layout. Two cut lines are placed over at least a part of the two conductive lines in the layout. The cut lines designate cut sections of the two conductive lines and the cut lines are spaced from each other within a fabrication process limit. The two cut lines are connected in the layout. The two conductive lines are patterned over a substrate in a physical integrated circuit using the two connected parallel cut lines. The two conductive lines are electrically conductive.
申请公布号 KR20150002499(A) 申请公布日期 2015.01.07
申请号 KR20140078060 申请日期 2014.06.25
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 LIU RU GUN;HSIEH TUNG HENG;TSAI TSUNG CHIEH;WU JUING YI;LEE LIANG YAO;TING JYH KANG
分类号 H01L21/027;H01L21/60 主分类号 H01L21/027
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