发明名称 DATA CONVERSION CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a data conversion circuit such that a transmission speed and the amount of data taken out of a dual-port RAM can be set and an error check on transmission data can be made. <P>SOLUTION: When the power source is turned on, data are set in a communication setting unit 41, a RAM area setting unit 42, and a parity setting unit 43. The communication speed setting unit 41 specifies a clock to be selected by a clock selector 52 to determine the operation speed of the dual-port RAM 51. The RAM area setting unit 42 determines a maximum count value of an address counter 55 to set the amount of data to be taken out of the dual-port RAM 51. External input data are written to the dual-port RAM 51 from a port A, read out from a port B, and input to a register 56 for data input, a data analyzer 57 analyzes the data, and a parity processing unit 58 generates a parity bit. A data transmission unit 59 adds a start bit, a stop bit, and the parity bit to the data input to the register 56 for data input and outputs the resulting data. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009004881(A) 申请公布日期 2009.01.08
申请号 JP20070161519 申请日期 2007.06.19
申请人 HITACHI KOKUSAI ELECTRIC INC 发明人 KUMAGAI TATSUJI
分类号 H04L29/08;G06F5/06;G06F13/38;H03M9/00;H04L7/04;H04L25/40 主分类号 H04L29/08
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