| 摘要 |
With an object of reducing a delay in signal transmission by a circuit that prevents malfunction due to dV/dt noise of a high potential side switching element (XD1) configuring a half bridge, pulse generating means (40) that outputs a set signal and reset signal for driving the high potential side switching element is such that, while either one of the set signal or reset signal is in an on-state as a main pulse signal for putting the high potential side switching element into a conductive state or non-conductive state, the other signal is turned on a certain time after the rise of the main pulse signal, thereby generating a condition in which the set signal and reset signal are both in an on-state. |
