发明名称 Passivated copper chip pads
摘要 A structure and method of forming passivated copper chip pads is described. In various embodiments, the invention describes a substrate that includes active circuitry and metal levels disposed above the substrate. A passivation layer is disposed above a last level of the metal levels. A conductive liner is disposed in the sidewalls of an opening disposed in the passivation layer, wherein the conductive liner is also disposed over an exposed surface of the last level of the metal levels.
申请公布号 US9373596(B2) 申请公布日期 2016.06.21
申请号 US201414307263 申请日期 2014.06.17
申请人 Infineon Technologies AG 发明人 Goebel Thomas;Kaltalioglu Erdem;Naujok Markus
分类号 H01L21/44;H01L21/768;H01L23/00 主分类号 H01L21/44
代理机构 Slater Matsil, LLP 代理人 Slater Matsil, LLP
主权项 1. A method for forming a semiconductor component, the method comprising: forming a cap layer over a last metal line of an inter level dielectric layer; forming a passivation layer over the cap layer; forming a insulating liner over the passivation layer; forming an opening in the cap layer, the passivation layer, and the insulating liner, wherein the opening exposes a portion of the last metal line; forming a conductive liner on surfaces of the opening by depositing the conductive liner on the opening and over the passivation layer and the insulating liner,depositing and patterning a photoresist layer, andusing the patterned photo resist as a mask to remove the conductive liner from over the insulating liner by using an etching process, wherein the conductive liner is removed entirely from over the insulating liner except over sidewalls of the opening, wherein the sidewalls of the conductive liner remaining after the etching process comprise a vertical section extending above a top surface of the passivation layer and a slanted section intersecting the vertical section; and depositing an under bump metallization layer over the conductive liner.
地址 Neubiberg DE