发明名称 |
Dynamic random access memory unit and method for fabricating the same |
摘要 |
A dynamic random access memory unit and a method for fabricating the same are provided. The dynamic random access memory unit comprises: a substrate; an insulating buried layer formed on the substrate; a body region formed on the insulating buried layer and used as a charge storing region; two isolation regions formed on the body region, in which a semiconductor contact region is formed between the isolation regions and is a charge channel; a source, a drain and a channel region formed on the isolation regions and the semiconductor contact region respectively and constituting a transistor operating region which is partially separated from the charge storing region by the isolation regions and connected with the charge storing region via the charge channel; a gate dielectric layer formed on the transistor operating region, a gate formed on the gate dielectric layer; a source metal contact layer, a drain metal contact layer. |
申请公布号 |
US8927966(B2) |
申请公布日期 |
2015.01.06 |
申请号 |
US201213703722 |
申请日期 |
2012.10.18 |
申请人 |
Tsinghua University |
发明人 |
Liu Libin;Liang Renrong;Wang Jing;Xu Jun |
分类号 |
H01L31/00;H01L29/78;H01L29/66;H01L27/108;H01L21/84;H01L29/775;H01L27/12 |
主分类号 |
H01L31/00 |
代理机构 |
Lerner, David, Littenberg, Krumholz & Mentlik, LLP |
代理人 |
Lerner, David, Littenberg, Krumholz & Mentlik, LLP |
主权项 |
1. A dynamic random access memory unit, comprising:
a substrate; an insulating buried layer formed on the substrate; a body region formed on the insulating buried layer and used as a charge storing region; two isolation regions formed on the body region, wherein a material of the two isolation regions is nonconductive, and a semiconductor contact layer is formed between the two isolation regions and is a charge channel; a source, a drain and a channel region formed on the two isolation regions and the semiconductor contact region respectively and constituting a transistor operating region, wherein the transistor operating region is spatially partially separated from the charge storing region by the two isolation regions, and the transistor operating region is connected with the charge storing region via the charge channel; a gate dielectric layer formed on the transistor operating region, and a gate formed on the gate dielectric layer; and a source metal contact layer formed on the source, and a drain metal contact layer formed on the drain. |
地址 |
CN |