Software-to-hardware compiler with symbol set inference analysis

摘要

A software-to-hardware compiler is provided that generates hardware constructs in programmable logic resources. The programmable logic resources may be optimized in terms of being configured to make additional copies of regions on memory devices other than on the programmable logic resources (e.g., RAM). This facilitates multiple reads during a single clock cycle. Symbol set analysis is used to minimize the size of regions to allow for more efficient use of hardware resources.

主权项

1. A method for converting software source code for a program into hardware constructs, the method comprising:
identifying a set of potentially recursive functions defined in the software source code, wherein each function in the identified set is configured to receive arguments; generating a new function based on the functions in the identified set, wherein the new function substitutes global variables for the arguments of each function in the identified set; generating a plurality of stacks, wherein each of the plurality of stacks is associated with a respective one of the functions in the identified set, and wherein each of the plurality of stacks stores the global variables corresponding to the function arguments, local variables, a return value, and a return address; and generating a plurality of stack pointers, wherein each of the plurality of stack pointers is associated with a respective one of the plurality of stacks, and wherein each of the plurality of stack pointers points to the one of the plurality of stacks with which it is associated.