发明名称 Semiconductor memory device having improved erase characteristic of memory cells and erase method thereof
摘要 A semiconductor memory device includes a plurality of memory blocks configured to include memory cells, a voltage supply circuit configured to supply an erase voltage for an erase operation of a memory block selected from the memory blocks and supply an erase verify voltage and an erase pass voltage for an erase verify operation of the memory block selected from the memory blocks, and a control logic configured to group word lines per specific word lines, when the erase verify operation for the selected memory block is performed, and control the voltage supply circuit so that one or more of the erase verify voltage and the erase pass voltage rise whenever the erase verify operation is performed.
申请公布号 US8929148(B2) 申请公布日期 2015.01.06
申请号 US201113293391 申请日期 2011.11.10
申请人 SK Hynix Inc. 发明人 Kim Hyung Seok
分类号 G11C11/36 主分类号 G11C11/36
代理机构 William Park & Associates Patent Ltd. 代理人 William Park & Associates Patent Ltd.
主权项 1. A semiconductor memory device, comprising: a plurality of memory blocks configured to comprise memory cells; a voltage supply circuit configured to, when an erase operation and an erase verify operation following the erase operation are repeatedly performed, supply an erase voltage for the erase operation of a memory block selected from the memory blocks and supply an erase verify voltage and an erase pass voltage for the erase verify operation of the memory block selected from the memory blocks; and a control logic configured to group word lines per specific word lines, when the erase verify operation for the selected memory block is performed, and control the voltage supply circuit so that one or more of the erase verify voltage and the erase pass voltage rise whenever the erase verify operation is performed, wherein a soft program operation of the selected memory block and a soft program verify operation of the selected memory block are repeatedly performed after a pass of the erase verify operation, wherein the voltage supply circuit supplies a soft program voltage for the soft program operation and supplies a soft program verify voltage and a soft program pass voltage for the soft program verify operation, wherein the control logic controls the voltage supply circuit so that one or more of the soft program verify voltage and the soft program pass voltage rise whenever the soft program verify operation is performed.
地址 Gyeonggi-do KR