发明名称 |
METHOD FOR CONTROLLING CACHE MEMORY AND APPARATUS THEREOF |
摘要 |
<p>Disclosed are a device for controlling a cache memory through power control based on the operation status of a processor and a method thereof. The method for controlling a cache memory includes: a step of extracting a processor operation mode representing the status of a processor core corresponding to an algorithm run in the processor core; and a step of controlling a cache linked with the processor core according to the processor operation mode. Also, a processor for executing the method for controlling a cache memory includes: a processor core; a cache which stores commands executed in the processor core; and a cache control unit which controls the cache according to the processor operation mode representing the status of the processor core determined according to the algorithm run in the processor core. Therefore, by activating a tag memory included in a group selected based on the processor operation mode and a selected way memory, it is possible to reduce power consumption by the cache.</p> |
申请公布号 |
KR20150001218(A) |
申请公布日期 |
2015.01.06 |
申请号 |
KR20130074061 |
申请日期 |
2013.06.26 |
申请人 |
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE |
发明人 |
HAN, JIN HO;KWON, YOUNG SU;SHIN, KYOUNG SEON;BYUN, KYUNG JIN;EUM, NAK WOONG |
分类号 |
G06F12/08;G06F9/06 |
主分类号 |
G06F12/08 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|