发明名称 Three dimensional structure memory
摘要 A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost. Fabrication of 3DS memory involves thinning of the memory circuit to less than 50 μm in thickness and bonding the circuit to a circuit stack while still in wafer substrate form. Fine-grain high density inter-layer vertical bus connections are used. The 3DS memory manufacturing method enables several performance and physical size efficiencies, and is implemented with established semiconductor processing techniques.
申请公布号 US8928119(B2) 申请公布日期 2015.01.06
申请号 US200912405240 申请日期 2009.03.17
申请人 发明人 Leedy Glenn J.
分类号 H01L23/48;H01L21/762;H01L23/538;G11C5/02;H01L21/768;H01L27/06;H01L27/108;H01L25/065;H01L23/522;G11C5/06 主分类号 H01L23/48
代理机构 Useful Arts IP 代理人 Useful Arts IP
主权项 1. A stacked integrated circuit comprising: a plurality of substantially flexible integrated circuits having topside and bottom-side surfaces, wherein said integrated circuits are stacked in relation to one another, wherein at least one of the substantially flexible integrated circuits comprises a substantially flexible monocrystalline semiconductor substrate of one piece made from a semiconductor wafer thinned by at least one of abrasion, etching and parting to expose a surface, and subsequently polishing or smoothing the exposed surface to form a polished or smoothed surface; and interconnections that pass through one or more of the plurality of substantially flexible integrated circuits and that electrically connect the plurality of substantially flexible integrated circuits, wherein the interconnections are vertical interconnections and are internal to the plurality of substantially flexible integrated circuits.
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