DOUBLE DATA RATE SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY MODULE AND METHOD FOR CONFIGURING THEREOF
摘要
<p>Disclosed are a double data rate synchronous dynamic random access memory module and a configuring method thereof. The DDR SDRAM module in accordance with an embodiment of the present invention includes: a plurality of memory chips; and a serial transceiver portion configured to serially receive first serial data including a control signal and data transferred from outside for the plurality of memory chips and to provide the control signal and the data included in the serially received first serial data to the plurality of memory chips.</p>
申请公布号
KR20150001188(A)
申请公布日期
2015.01.06
申请号
KR20130073985
申请日期
2013.06.26
申请人
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
发明人
KWON, HYUK JE;CHOI, YOUNG SEOK;KIM, SUNG NAM;KIM, GYUNG OCK