Efficient network and memory architecture for multi-core data processing

摘要

The invention provides hardware logic based techniques for a set of processing tasks of a software program to efficiently communicate with each other while running in parallel on an array of processing cores of a multi-core data processing system dynamically shared among a group of software programs. These inter-task communication techniques comprise, by one or more task of the set, writing their inter-task communication information to a memory segment of other tasks of the set at the system memories, as well as reading inter-task communication information from their own segments at the system memories. The invention facilitates efficient inter-task communication on a multi-core fabric, without any of the communications tasks needing to know whether and at which core in the fabric any other task is executing at any given time. The invention thus enables flexibly and efficiently running any task of any program at any core of the fabric.

主权项

1. A digital logic system for a set of processing tasks of a software program, while running in parallel on an array of processing cores of a multi-core data processing fabric, to communicate with each other, the system comprising:
a set of task-specific memory segments at a fabric memory for storing information being exchanged among the set of processing tasks; a subsystem for the set of processing tasks to exchange information among each others using the fabric memory; and a hardware logic based controller that repeatedly assigns processing tasks of software programs for the cores of the array to process at least in part based on repeated allocations of the array of cores among the software programs, with at least a given one of said allocations produced through steps of:
(i) initially, a subset of the cores are allocated among the programs so that any actually materialized demands for the cores by each of the programs up to their respective entitled shares of the cores are met;(ii) following step (i), any of the cores that remain unallocated are allocated among the programs whose materialized demands for the cores had not been met by amounts of the cores so far allocated to them by the given one of the allocations; and(iii) following step (ii), any of the cores that remain unallocated are allocated among the programs,wherein said subsystem is controlled at least in part by said controller.