| 主权项 |
1. A computer system for calculating a remainder by division of a sequence of bytes interpreted as a first number by a second number, comprising:
a first hardware processor device adapted for reading a first subset of a sequence of bytes from a memory, and calculating and storing an associated first remainder by division, wherein the first remainder is stored in the memory location from which the first subset was read; a second hardware processor device adapted for reading a second subset of the sequence of bytes from the memory, and calculating and storing an associated second remainder by division, wherein the second remainder is stored in the memory location from which the second subset was read,
wherein the first hardware processor is further adapted for reading the first and second remainders from the memory, and calculating and storing a third remainder by division based on the calculating of the first remainder by division and the calculating of the second remainder by division, wherein the third remainder is stored in the memory location from which the first and second remainders were read; a third hardware processor device adapted for reading a third subset of the sequence of bytes from the memory, and calculating and storing an associated fourth remainder by division at least partially during the calculating of the second remainder by division, wherein the fourth remainder is stored in the memory location from which the third subset was read; and a fourth hardware processor device adapted for reading a fourth subset of the sequence of bytes from the memory, and calculating and storing an associated fifth remainder by division at least partially during the calculating of the fourth remainder by division, wherein the fifth remainder is stored in the memory location from which the fourth subset was read,
wherein the third hardware processor device is further adapted for reading the fourth and fifth remainders from the memory, and calculating and storing a sixth remainder by division based on the calculating of the fourth remainder by division and the calculating of the fifth remainder by division, after the calculating of the fourth remainder by division and the calculating of the fifth remainder by division, and for calculating the sixth remainder by division at least partially during the calculating of the third remainder by division, wherein the sixth remainder is stored in the memory location from which the fourth and fifth remainders were read, andwherein the first hardware processor device is further adapted for reading the third and sixth remainders from the memory, and calculating and storing a seventh remainder by division based on the calculating of the third remainder by division and the calculating of the sixth remainder by division, after the calculating of the third remainder by division and the calculating of the sixth remainder by division, and an input based on an output of the from the third hardware processor device, wherein the seventh remainder is stored in the memory location from which the third and sixth remainders were read. |
