Amplifier bandwidth extension for high-speed tranceivers

摘要

There is presented a high bandwidth circuit for high-speed transceivers. The circuit may comprise an amplifier combining capacitor splitting, inductance tree structures, and various bandwidth extension techniques such as shunt peaking, series peaking, and T-coil peaking to support data rates of 45 Gbs/s and above while reducing data jitter. The inductance elements of the inductance tree structures may also comprise high impedance transmission lines, simplifying implementation. Additionally, the readily identifiable metal structures of inductors and t-coils, the equal partitioning of the load capacitors, and the symmetrical inductance tree structures may simplify transceiver implementation for, but not limited to, a clock data recovery circuit.

主权项

1. An amplifier comprising:
a voltage supply connected to a first t-coil and a second t-coil; a plurality of output points comprising a first portion of plural output points and a second portion of plural output points, wherein each of the plurality of output points is disposed at a connection point between a respective inductor and a respective load capacitor; the first t-coil connected to each of the first portion of output points by the respective inductors and the second t-coil connected to each of the second portion of output points by the respective inductors.