发明名称 Concurrent array-based queue
摘要 According to one embodiment, a method for implementing an array-based queue in memory of a memory system that includes a controller includes configuring, in the memory, metadata of the array-based queue. The configuring comprises defining, in metadata, an array start location in the memory for the array-based queue, defining, in the metadata, an array size for the array-based queue, defining, in the metadata, a queue top for the array-based queue and defining, in the metadata, a queue bottom for the array-based queue. The method also includes the controller serving a request for an operation on the queue, the request providing the location in the memory of the metadata of the queue.
申请公布号 US8930596(B2) 申请公布日期 2015.01.06
申请号 US201213690028 申请日期 2012.11.30
申请人 International Business Machines Corporation 发明人 Heidelberger Philip;Steinmacher-Burow Burkhard
分类号 G06F3/00;H04L12/28;G06F12/14;G06F12/06 主分类号 G06F3/00
代理机构 Cantor Colburn LLP 代理人 Cantor Colburn LLP
主权项 1. A method for implementing an array-based queue in memory of a memory system that includes a controller, the method comprising: configuring, in the memory, metadata of the array-based queue, the configuring comprising: defining, in the metadata, an array start location in the memory for the array-based queue;defining, in the metadata, an array size for the array-based queue;defining, in the metadata, a queue top for the array-based queue; anddefining, in the metadata, a queue bottom for the array-based queue; and serving, by the controller, a request for an operation on the queue, the request providing the location, in the memory, of the metadata of the queue, wherein the request corresponds to a single load instruction or a single store instruction wherein the single load or single store instruction comprises an atomic memory operation received and served by the controller and the single load or single store instruction supports concurrent requests.
地址 Armonk NY US