Circuits and methods for one-wire communication bus of using pulse-edge for clock and pulse-duty-cycle for data

摘要

A one-wire communication bus for transferring a sequence of digital data from a transmitter to a receiver includes (a) an ECDD signal modulation circuit to create an electrical pulse train wherein each pulse's edge is used as clock signal and each pulse's duty cycle is used to represent digital value of zero and one; (b) an ECDD signal demodulation circuit to receive the ECDD pulse train using a group of sampling cells and to decode the sampled results using a majority voting circuit; (c) an electrical connection between a transmitter wherein the ECDD signal modulation circuit resides and a receiver wherein the ECDD signal demodulation circuit resides. Said ECDD signal is sent from the transmitter to the receiver through the electrical connection. Methods of creating the ECDD pulse train in the transmitter and decoding the ECDD pulse train in the receiver are also disclosed.

主权项

1. A system for one-wire communication bus of using pulse-edge for clock and pulse-duty-cycle for data, comprising:
a reference clock signal input for receiving a reference clock signal; a data signal input for receiving a sequence of digital data; an electrical connection having a first end and a second end, for transferring an Edge-for-Clock-Duty-cycle-for-Data (ECDD) signal, said ECDD signal is an electrical pulse train wherein each pulse consists of a portion of level-high and a portion of level-low, a transition from level-low to level-high is defined as rising edge and a transition from level-high to level-low is defined as falling edge, the rising and falling edges are pulse-edges, a ratio of time used by level-high to time used by level-low is pulse-duty-cycle; a transmitter circuit for generating and outputting said ECDD signal, comprising:
a data output for delivering generated ECDD signal;a data latch circuit, having a first input receiving a clock signal, having a second input receiving the sequence of digital data from said data signal input, for generating a sequence of digital data according to a received data using received clock signal, having an output for delivering said sequence of digital data;a base-time-unit generation circuit, having an input receiving said reference clock signal, for generating a plurality of evenly-spaced-in-phase outputs, having an output for delivering said plurality of evenly-spaced-in-phase outputs, the base-time-unit is a time span between rising (or falling) edges of any two adjacent said outputs;a ECDD modulation circuit, having a first input receiving said sequence of digital data generated from the data latch circuit, having a second input receiving said plurality of outputs generated from the base-time-unit generation circuit, for creating each pulse in ECDD pulse train according to a value of said sequence of digital data in each clock cycle, having an output for delivering the generated ECDD signal;wherein said ECDD signal is connected to the first input of the data latch circuit as clock signal; a receiver circuit for receiving and decoding said ECDD signal, comprising:
a data input for receiving the ECDD signal;a sampling-clocks generation circuit, having an input receiving said ECDD signal, for generating a plurality of evenly-spaced-in-phase sampling clock signals, having a first output for delivering said plurality of sampling clock signals, having a second output for delivering a selected one from said plurality of sampling clock signals as the receiver circuit's clock output;a ECDD demodulation circuit, having a first input receiving said ECDD signal, having a second input receiving said plurality of sampling clock signals from the sampling-clocks generation circuit, for generating a sequence of digital data according to the pulse-duty-cycle of each pulse in said ECDD signal, having an output for delivering said sequence of digital data as the receiver circuit's data output; wherein said data output of the transmitter is connected to the first end of said electrical connection; wherein said data input of the receiver is connected to the second end of said electrical connection.