发明名称 |
Random number generation circuit |
摘要 |
According to one embodiment, a random number generation circuit includes an oscillation circuit and a holding circuit. The oscillation circuit has an amplifier array and a high-noise circuit. Amplifiers are connected in series in the amplifier array, and the amplifier array has a terminal between neighboring amplifiers. The high-noise circuit is inserted between other neighboring amplifiers in the amplifier array, and the high-noise circuit generates noise required to generate jitter in an oscillation signal from the amplifier array. The holding circuit outputs, as a random number, the oscillation signal held according to a clock signal. |
申请公布号 |
US8930428(B2) |
申请公布日期 |
2015.01.06 |
申请号 |
US201213428150 |
申请日期 |
2012.03.23 |
申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
Yasuda Shinichi;Ikegami Kazutaka |
分类号 |
G06F7/58;H03K3/84 |
主分类号 |
G06F7/58 |
代理机构 |
Ohlandt, Greeley, Ruggiero & Perle, L.L.P. |
代理人 |
Ohlandt, Greeley, Ruggiero & Perle, L.L.P. |
主权项 |
1. A random number generation circuit comprising:
an oscillation circuit which has an amplifier array in which a plurality of amplifiers are connected in series, and which has a terminal between neighboring amplifiers, and a high-noise circuit which is inserted between other neighboring amplifiers in the amplifier array, and generates noise required to generate jitter in an oscillation signal from the amplifier array; and a holding circuit which is connected to the terminal, holds the oscillation signal according to a clock signal having a frequency lower than an oscillation frequency of the oscillation signal, and outputs, as a random number, the oscillation signal held according to the clock signal, wherein the high-noise circuit comprises: an NMOS transistor which has a first gate terminal, a first source terminal, and a first drain terminal, and in which the first drain terminal is connected to a high-potential side power supply and; and a PMOS transistor which has a second gate terminal, a second source terminal, and a second drain terminal, and in which the second drain terminal is connected to the low-potential side power supply, the second gate terminal is connected to the first gate terminal, and the second source terminal is connected to the first source terminal. |
地址 |
Minato-ku, Tokyo JP |