Semiconductor package having through silicon via (TSV) interposer and method of manufacturing the semiconductor package

摘要

A semiconductor package having a reduced size by including an interposer having through substrate vias (TSVs), the semiconductor package may comprise a lower semiconductor package which includes a lower base substrate, an interposer with TSVs on the lower base substrate, and a lower semiconductor chip on the interposer and electrically connected to the interposer. The semiconductor package may include an upper semiconductor package on the lower semiconductor package including an upper semiconductor chip and package connecting members on the interposer and electrically connect the upper semiconductor package to the interposer. An exterior molding member may be provided.

主权项

1. A semiconductor package comprising:
a lower semiconductor package comprising:
an interposer formed of a semiconductor material or a glass material comprising a lower surface, an upper surface, lower terminals on a lower surface, upper terminals on an upper surface and through substrate vias extending through at least a substrate of the interposer and electrically connecting ones of the lower terminals of the interposer to corresponding ones of the upper terminals of the interposer;a lower semiconductor chip mounted to the interposer, the lower semiconductor chip including chip pads electrically connected to at least some of the upper terminals of the interposer; anda molding material surrounding sides of the lower semiconductor chip; an upper semiconductor device stacked on the lower semiconductor package comprising:
a lower surface;terminals at the lower surface; andan integrated circuit electrically connected to at least some of the terminals on the lower surface; and conductive bumps disposed on the upper surface of the interposer and extending to the lower surface of the upper semiconductor device and electrically connecting ones of the upper terminals on the upper surface of the interposer to corresponding ones of the terminals at the lower surface of the upper semiconductor device, each of the conductive bumps comprising a lower portion and an upper portion, wherein the interposer is comprised of silicon, germanium, silicon-germanium, or gallium arsenide.