发明名称 Fin field effect transistor, semiconductor device including the same and method of forming the semiconductor device
摘要 A fin field effect transistor includes a first fin structure and a second fin structures both protruding from a substrate, first and second gate electrodes on the first and second fin structures, respectively, and a gate dielectric layer between each of the first and second fin structures and the first and second gate electrodes, respectively. Each of the first and second fin structures includes a buffer pattern on the substrate, a channel pattern on the buffer pattern, and an etch stop pattern provided between the channel pattern and the substrate. The etch stop pattern includes a material having an etch resistivity greater than that of the buffer pattern.
申请公布号 US9391134(B2) 申请公布日期 2016.07.12
申请号 US201414336084 申请日期 2014.07.21
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 Yang Chang-Jae;Kim Sang-Su;Lee Jae-Hwan;Choi Jung-Dal
分类号 H01L29/06;H01L21/8238;H01L21/84;H01L27/092;H01L27/12 主分类号 H01L29/06
代理机构 Muir Patent Law, PLLC 代理人 Muir Patent Law, PLLC
主权项 1. A fin field effect transistor comprising: a first fin structure and a second fin structure, each of the first and second fin structures protruding from a substrate; a first gate electrode on the first fin structure, and a second gate electrode on the second fin structure; and a gate dielectric layer between each of the first and second fin structures and the first and second gate electrodes, respectively, wherein each of the first and second fin structures comprises: a buffer pattern including a first buffer pattern and a second buffer pattern that are sequentially stacked on the substrate;a channel pattern on the buffer pattern; andan etch stop pattern between the channel pattern and the substrate, the etch stop pattern including a material having an etch resistivity greater than that of the buffer pattern,wherein the etch stop pattern is disposed between the first buffer pattern and the second buffer pattern, andwherein each of the first and second buffer patterns includes a semiconductor pattern.
地址 Yeongtong-gu, Suwon-si, Gyeonggi-do KR