发明名称 |
Multiple silicide integration structure and method |
摘要 |
A structure and method for providing a multiple silicide integration is provided. An embodiment comprises forming a first transistor and a second transistor on a substrate. The first transistor is masked and a first silicide region is formed on the second transistor. The second transistor is then masked and a second silicide region is formed on the first transistor, thereby allowing for device specific silicide regions to be formed on the separate devices. |
申请公布号 |
US9391067(B2) |
申请公布日期 |
2016.07.12 |
申请号 |
US201514673388 |
申请日期 |
2015.03.30 |
申请人 |
Taiwan Semiconductor Manufacturing Company, Ltd. |
发明人 |
Yeh Der-Chyang;Hsia Hsing-Kuo;Lin Hao-Hsun;Chao Chih-Ping;Su Chin-Hao;Cheng Hsi-Kuei |
分类号 |
H01L27/06;H01L21/285;H01L21/8249;H01L29/45 |
主分类号 |
H01L27/06 |
代理机构 |
Slater Matsil, LLP |
代理人 |
Slater Matsil, LLP |
主权项 |
1. A semiconductor device comprising:
a substrate with a first transistor and a second transistor, the second transistor being a different type of transistor than the first transistor; a first silicide layer located on a source/drain region of the first transistor and on a gate electrode of the first transistor, the first silicide layer comprising a first material and having a first thickness; and a second silicide layer located on an emitter and a first portion of a top surface of a base connection of the second transistor but not on a second portion of the top surface of the base connection, the second silicide layer comprising a second material different from the first material and having a second thickness different from the first thickness. |
地址 |
Hsin-Chu TW |