发明名称 Integrated circuit on SOI comprising a transistor protecting from electrostatic discharges
摘要 An integrated circuit includes first and second electronic components, a buried UTBOX insulating layer, first and second ground planes plumb with the first and second electronic components, first and second wells, first and second biasing electrodes making contact with the first and second wells and with the first and second ground planes, a third electrode making contact with the first well, a first trench isolation separating the first and third electrodes and extending through the buried insulating layer as far as into the first well, and a second trench isolation that isolates the first electrode from the first component, and that does not extend as far as the interface between the first ground plane and the first well.
申请公布号 US9391057(B2) 申请公布日期 2016.07.12
申请号 US201414261757 申请日期 2014.04.25
申请人 Commissariat a l'energie atomique et aux energies alternatives;STMicroelectronics SA 发明人 Fenouillet-Beranger Claire;Fonteneau Pascal
分类号 H01L29/74;H01L27/02;H01L27/12 主分类号 H01L29/74
代理机构 Occhiuti & Rohlicek LLP 代理人 Occhiuti & Rohlicek LLP
主权项 1. A manufacture comprising an integrated circuit arranged on and in a p-doped substrate, said integrated circuit comprising a bipolar transistor for protecting from electrostatic discharges, an n-doped first semiconductor element, a p-doped well, a deep buried n-doped well, an n-doped first implanted zone, a p-doped second implanted zone, a p-doped third implanted zone, a fourth implanted zone, a first trench isolation, a second trench isolation, and a third trench isolation, wherein said n-doped first semiconductor element comprises a bottom, wherein said n-doped first implanted zone is arranged on said first semiconductor element, wherein said n-doped first implanted zone forms, with said n-doped first semiconductor element, a base of said bipolar transistor, wherein said p-doped second implanted zone forms an emitter of said bipolar transistor, wherein said p-doped second implanted zone is arranged on said n-doped first semiconductor element, wherein said p-doped well is arranged in said deep buried n-doped well, wherein said p-doped well is arranged under said n-doped first implanted zone and said p-doped second implanted zone, wherein said p-doped well makes contact with said bottom of said n-doped first semiconductor element, wherein said p-doped well has a top part, wherein said p-doped third implanted zone is arranged on said p-doped well, wherein said p-doped third implanted zone forms, with said p-doped well, a collector of said bipolar transistor, wherein said fourth implanted zone is arranged in said top part, wherein said first trench isolation separates said first and second implanted zones, wherein said first trench isolation extends into said n-doped first semiconductor element by an amount equal to a first depth, wherein said first trench isolation extends into said n-doped first semiconductor element without reaching said bottom of said n-doped first semiconductor element, wherein said second trench isolation extends as far as below said n-doped first semiconductor element, and wherein said third trench isolation separates said third and fourth implanted zones and extends to a depth equal to said first depth.
地址 Paris FR