Semiconductor memory cell, device, and method for manufacturing the same

摘要

A semiconductor memory cell, a semiconductor memory device, and a method for manufacturing the same are disclosed. The semiconductor memory cell may comprise: a substrate; a channel region on the substrate; a gate region above the channel region; a source region and a drain region on the substrate and at opposite sides of the channel region; and a buried layer, which is disposed between the substrate and the channel region and comprises a material having a forbidden band narrower than that of a material for the channel region material. The buried layer material has a forbidden band narrower than that of the channel region material, so that a hole barrier is formed in the buried layer. Due to the barrier, it is difficult for holes stored in the buried layer to leak out, resulting in an improved information holding duration of the memory cell utilizing the floating-body effect.

主权项

1. A semiconductor memory cell, comprising:
a buried layer and a channel layer stacked on a substrate in a stacking direction substantially vertical to a surface of the substrate, wherein the buried layer is configured to store charges during operation of the memory cell, and has its opposite ends in a lateral direction substantially perpendicular to the stacking direction recessed with respect to the channel layer; a gate region above the channel layer; a source region and a drain region formed in the channel layer, wherein the gate region is configured to induce a channel region between the source region and the drain region in the channel layer; and an insulation layer provided between the source and drain regions and the substrate and adjacent to the opposite ends of the buried layer; wherein the buried layer comprises a material having a forbidden band narrower than that of a material for the channel layer, and is configured to suppress leakage of the charges stored therein into the source and drain regions.