Sampling

摘要

There is disclosed current-mode time-interleaved sampling circuitry configured to be driven by substantially sinusoidal clock signals. Such circuitry may be incorporated in ADC circuitry, for example as integrated circuitry on an IC chip. The disclosed circuitry is capable of calibrating itself without being taken off-line.

主权项

1. Current-mode circuitry, comprising:
a first node configured to have a flowing current supplied thereto, wherein the flowing current changes in response to an input signal; a plurality of switches comprising a plurality of first terminals and a plurality of second terminals, wherein each of the plurality of first terminals couples to the first node; and a plurality of second nodes, wherein each of the plurality of second nodes couples to a corresponding one of the plurality of the second terminals, wherein the plurality of switches are configured to be sequentially selected during a corresponding plurality of selection periods which occur in succession, successive selection periods of the plurality of selection periods being partially overlapped; and wherein the circuitry is configured to provide respective sinusoidal control signals to the switches between the first node and the second nodes to control the switches.